The present invention relates generally to semiconductor device fabrication and, more particularly, to electrostatic discharge (ESD) devices for protecting an Input/Output pad in radio frequency and analog mixed signal applications, as well as methods of forming ESD protection devices and design structures for BiCMOS integrated circuits.
Modern electronics achieve high levels of functionality in small form factors by integrating multiple functions onto a single chip. A common fabrication process that allows high levels of integration at a relatively low cost is Complementary Metal-Oxide-Semiconductor (CMOS). CMOS processes build a combination of p-type and n-type metal-oxide-semiconductor field-effect transistors (MOSFETs) to implement logic gates and other types of digital circuits. By introducing additional fabrication steps into a CMOS process forming MOSFETs, bipolar junction transistors can also be formed in a process commonly known as BiCMOS. BiCMOS processes are often used to fabricate single-chip mixed signal integrated circuits when the performance requirements of the analog section cannot be met by MOSFETs alone.
Chips are often exposed to electrostatic discharge (ESD) events leading to potentially large and damaging currents within the integrated circuit. Increasing integration densities and performance demands on CMOS and BiCMOS chips have resulted in reduced device dimensions, which have increased the susceptibility of the integrated circuit to ESD. Manufacturers, assemblers, and users of integrated circuits must take precautions to avoid ESD. For example, ESD prevention can be part of the integrated circuit itself and may include special design techniques for input and output pins.
The problem of providing effective ESD protection in mixed signal applications is further complicated by the necessity of handling analog signals. Analog signals typically present a wider range of voltages than digital signals, thus requiring mixed signal chips to tolerate larger input voltages before ESD protection devices are triggered. This reduces the voltage window for ESD device operation, placing a further constraint on the types of devices that can be used. High frequency applications further require that ESD protection devices provide low capacitive loading of the input.
Therefore, there is a need for improved ESD protection devices that can protect an integrated circuit from negative and/or positive electrostatic discharges, as well as methods of making ESD protection devices and design structures for BiCMOS integrated circuits.